That makes perfect sense. Sorry to bombard you with these big chunks of code, but I think they can be summed up easily and I want to verify I have the fine details correct as it seems a little strange.
Quote:
Code block address: E208 Length: 110 M:1 X:0 called by: E383
00E208 AE3610 ldx 0x1036 ; Call target from E383 ; TPS_Voltage
00E20B 8ED211 stx 0x11d2
00E20E 342008FC bbc #0x08, dp + 0x20, 0xe20e ; Read from A/D control register, Branch target from E20E
00E212 A622 ldx dp + 0x22 ; Read from A/D successive approximation register
00E214 642004 ldm #0x04, dp + 0x20 ; Write to A/D control register
00E217 8622 stx dp + 0x22 ; Write to A/D successive approximation register
00E219 D8 clm ; m:0 x:0
00E21A 8A txa
00E21B 38 sec
00E21C EDD411 sbc ax, 0x11d4
00E21F B004 bcs 0xe225
00E221 49FFFF eor ax, #0xffff
00E224 3A inc ax
00E225 8D0410 sta ax, 0x1004 ; Branch target from E21F
00E228 34200800FB bbc #0x0008, dp + 0x20, 0xe228 ; Read from A/D control register, Branch target from E228
00E22D A422 ldy dp + 0x22 ; Read from A/D successive approximation register
00E22F 98 tya
00E230 38 sec
00E231 EDD411 sbc ax, 0x11d4
00E234 B004 bcs 0xe23a
00E236 49FFFF eor ax, #0xffff
00E239 3A inc ax
00E23A CD0410 cmp ax, 0x1004 ; Branch target from E234
00E23D B001 bcs 0xe240
00E23F BB tyx
00E240 8ED411 stx 0x11d4 ; Branch target from E23D
00E243 8A txa
00E244 4A lsr ax
00E245 4A lsr ax
00E246 F8 sem ; m:1 x:0
00E247 8D8C12 sta al, 0x128c ; SM_TPS
00E24A D8 clm ; m:0 x:0
00E24B 8A txa
00E24C 8D3610 sta ax, 0x1036 ; TPS_Voltage
00E24F F8 sem ; m:1 x:0
00E250 A24E10 ldx #0x104e
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So here it is basically just reading the tps value from the A/D converter twice in a row and comparing it to the previous tps value (11d4). It stores the difference (absolute value) of the first read/comparison at 1004. It compares the difference (absolute value) of the second read/comparison with 1004 and stores the TPS value corresponding to the smallest difference at 11d4. Then the value is converted to 8 bit and stored at 128c(SM TPS). The value is stored in 16 bit at 1036(TPS volts).
I am doubting my understanding of the carry flag here. I would assume that the program would want the bigger change, but the way I read it if the second read/compare is greater than or equal to the first the program skips over the command to transfer the contents of y (second read/compare) to x and stores the tps value corresponding the first (and smaller change) tps value.
[QUOTE=
00E253 2C2610101E bbs #0x10, 0x1026, 0xe276 ; Errorflags 1 ; TPS Error
[/QUOTE]
I will take the easy route here and I will say that the program has detected a fault with the tps and the bit corresponding to a tps error has been set.
Quote:
Code block address: E276 Length: 9 M:1 X:0 called by: E253
00E276 AD238B lda al, 0x8b23 ; Branch target from E253
00E279 0C251001 seb #0x01, 0x1025
00E27D 800D bra 0xe28c
Code block address: E27F Length: 23 M:1 X:0 called by: E270
00E27F 2C1E102012 bbs #0x20, 0x101e, 0xe296 ; Branch target from E270, Branch target from E274
00E284 0C1E1020 seb #0x20, 0x101e
00E288 1C251001 clb #0x01, 0x1025 ; Branch target from E296
00E28C 9500 sta al, dp + 0x00 + ix ; Branch target from E27D, Branch target from E292
00E28E CA dex
00E28F E04410 cpx #0x1044
00E292 D0F8 bne 0xe28c
00E294 8040 bra 0xe2d6
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So here I believe a default 8 bit value (hex 14 if I read it right) is loaded from the rom to A.
bit 01 of 1025 is set and the program branches to e28c where e28c-e292 is executed 11 times total(104e-1044). During this loop the default value (in this example) that has been loaded into A is stored 11 times somewhere (dp + 0x00 + ix). I am pretty sure that the 104e-1044 makes up the ix portion of the equation, so is it just 104e-1044 that the value is written to?
Quote:
00E2D6 8D4410 sta al, 0x1044 ; Branch target from E294
00E2D9 8D8512 sta al, 0x1285 ; Write to RAM: TPS
00E2DC 8D1840 sta al, 0x4018
00E2DF 60 rts
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Cakewalk. Store the value in A at 1044 (seems redundant if my guess at where A is being stored above is correct).
Store the value in A at 1285.
Store the value in A at 4018.
Return.